Enhanced Buffer Router Design in NOC

Abstract

This paper presents an advance router design using enhanced buffer. The design provides advantages of both buffer and bufferless network for that two cross bar switches are used. The concept of virtual channel (VC) is eliminated from the previous design by using an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input virtual channel buffers (VCBs). This can be addressed by providing enhanced buffers on the bufferless link and creating two virtual networks. With this approach, VCBs act as distributed FIFO buffers. Without VCBs or VCs, deadlock prevention is achieved by duplicating physical channels. An enhanced buffer provides a function of hand shaking by providing a ready valid handshake signal and two bit storage. Through this design the power is saving to 18.98% and delay is reduced by 99.13% as compared with the generic router and the power is saving to 15.65% and delay is reduced to 97.88% as compared to virtual channel router. General Terms Router design, Virtual channel, Buffer architecture, Virtual Channel Allocation.