Energy efficient SVM classifier using approximate computing

Abstract

Approximate computing is a promising approach to reduce great power consumption in modern very large scale integration (VLSI) systems. In this paper, a novel approximate adder with a much simplified carry compensation scheme is proposed. Besides, an approximate fixed-width multiplier with a low-cost compensation unit is introduced. To evaluate the effectiveness of the proposed approximate computing units, the application of the approximate computing in support vector machine (SVM) is investigated. Simulation results show that the approximation errors have negligible impact on the classification accuracy. Under the TSMC 90nm CMOS technology, the synthesis results indicate that the SVM classifier using approximate computing can reduces the power-delay product (PDP), area and critical path delay by 32.4%, 18.7% and 16.0%, respectively, compared to the same classifier with accurate computation units.