Abstract
A compact current mode multiplier/divider model used in signal processing is reported. Intelligent systems require signal process that will be done quickly and accurately. Multiplier divider circuit is the basic block which should be present in every signal processing circuit especially in sensor circuits. This model has been designed with Organic Field Effect Transistors in bottom gate with top drain and source electrode, thermally grown SiO2 as dielectric and Poly-Hexyl-Thiophene as organic material and verified using PSPICE. The simulation result indicates that the projected computational structure generates output voltage of 80mV, power consumption around 60 μW and one dimensionality error below 0.75% with 1V as input voltage that occupies 600 μm2 area.
Published Version
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