Abstract
The flip chip bonding technology is widely used in electronic packaging as a result of improvements towards mechanical performance of layered structures. However, thermal mismatch shear and peeling stress are often induced by the differences of the material properties and geometries of bond layer during the high temperature change at operating stage. Intrinsically, these thermo-mechanical stresses play a very significant role in the design and reliability of the flip chip package. Therefore, this project aims to develop a methodology to find optimized bonding material thermo-mechanical properties and geometries in relation to the packaging layers in order to eliminate or reduce thermal mismatch stresses that occur in multi-layered structures in electronic packaging. The closed-form solution of thermo-mechanical analysis of bi-material assembly with bond layer is provided. Parametric study will be carried out in order to study the influence of bond layer parameters on interfacial thermal stresses of a flip chip assembly. These parameters include Young modulus, Coefficient of Thermal Expansion (CTE), Poisson’s ratio and thickness of the bond layer. It is found that the shearing stresses and peeling stresses decreased considerably at the interface with the increase of bond layer Young Modulus and thickness. On the other side, bond layer CTE and Poisson ratio show almost no significant effect on the interfacial shearing stress and peeling stress along the interface in a bi-material assembly.
Highlights
IntroductionOriginal flip chip assembly used the ceramic substrate with Coefficient of Thermal Expansion (CTE) that matching with silicon die
As the dramatic increasing demand of microelectronics over the past decade, flip chip microelectronic packages are increasingly being used in microelectronics system applications such as cellular phones, pagers, laptops, Personal Digital Assistants (PDAs), and watches [1,2,3,4,5,6,7,8,9].Original flip chip assembly used the ceramic substrate with Coefficient of Thermal Expansion (CTE) that matching with silicon die
The closed-form solution of thermo-mechanical analysis of bi-material assembly with bond layer is provided .Parametric study will be carried out in order to study the influence of bond layer parameters on interfacial thermal stresses of a flip chip assembly
Summary
Original flip chip assembly used the ceramic substrate with CTE that matching with silicon die. Ceramic substrates are expensive as these materials require high temperature processing, and limits the application of flip chip technology in low cost products. Organic substrates are cheaper but the high CTE differences between the substrate and silicon die will induce large thermal stress on the laminate layers during operation of the device. This reliability concern has limited the types of applicable substrate for the flip chip assemblies for many years until the bonding layer was introduced [10,11]. Bonding layer compensates for the difference of material properties between silicon die and the substrate
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