Dynamic and Static Calibration of Ultra-Low-Voltage, Digital-Based Operational Transconductance Amplifiers

Pedro Toledo,Sergio Bampi,Hamilton Klimach,Paolo Crovetti

doi:10.3390/electronics9060983

Abstract

The calibration of the effects of process variations and device mismatch in Ultra Low Voltage (ULV) Digital-Based Operational Transconductance Amplifiers (DB-OTAs) is addressed in this paper. For this purpose, two dynamic calibration techniques, intended to dynamically vary the effective strength of critical gates by different modulation strategies, i.e., Digital Pulse Width Modulation (DPWM) and Dyadic Digital Pulse Modulation (DDPM), are explored and compared to classic static calibration. The effectiveness of the calibration approaches as a mean to recover acceptable performance in non-functional samples is verified by Monte-Carlo (MC) post-layout simulations performed on a 300 mV power supply, nW-power DB-OTA in 180 nm CMOS. Based on the same MC post-layout simulations, the impact of each calibration strategy on silicon area, power consumption, and OTA performance is discussed.

Highlights

Small dimensions and low power consumption are critical requirements of pervasive, energy autonomous sensor nodes for the Internet of Things (IoT) [1,2,3,4], Figure 1a
To compare the calibration approaches (SDC and Dynamic Digital Calibration (DDC) using Digital Pulse Width Modulation (PWM) (DPWM) and Dyadic Digital Pulse Modulation (DDPM) modulations), a Digital-Based Operational Transconductance Amplifiers (DB-Operational Transconductance Amplifier (OTA)) designed in CMOS 180 nm technology has been considered [16,29]
It is observed that in both the proposed DPWM and DDPM DDC techniques, calibration accuracy is related to the period T0 of the dynamic calibration signal and is traded off with an increased power consumption in the DB-OTA circuit and in the modulator

Summary

Introduction

Small dimensions and low power consumption are critical requirements of pervasive, (nearly) energy autonomous sensor nodes for the Internet of Things (IoT) [1,2,3,4], Figure 1a. In [8,9] gate-driven MOS transistors working in subthreshold regime are exploited (Figure 1b) and the minimum power supply and common mode input range (CMIR) are limited to VDD = 3Vsat ≈. Inverter-based amplifiers [11,12] (Figure 1d–e) have been proposed to achieve a large equivalent transconductance (gmTOTAL = gmPMOS + gmNMOS ) under low VDD and voltage headroom. They suffer of limited intrinsic gain and common-mode rejection in nanometer-scale technologies

Results

Discussion

Conclusion