Design scheme for broadband Doherty power amplifier using broadband load combiner

Abstract

This article proposes a design strategy for broadband Doherty power amplifier PA using broadband load combiner. The bandwidth of the Doherty PA based on the proposed combiner using packaged transistor is about 2.5 times the bandwidth of conventional Doherty PA using a quarter-wave transformer. An easy to implement analytical design methodology has been presented for the proposed load-combiner while describing the bandwidth enhancement strategy. The design methodology is validated with the design of a broadband Doherty PA based on CREE 10 W packaged GaN high electron mobility transistor devices using the proposed load combiner. Measurement results show more than 45% drain efficiency at 6 dB output power back-off OPBO over 400 MHz frequency range, centred around 1.95 GHz. The peak drain efficiency at saturation is better than 60% over this band of operation. At 6 dB OPBO, the maximum improvement of 18.5% in drain efficiency is achieved as compared to the balanced mode PA. Measurement with single carrier wideband code division multiple access modulated signal shows the average drain efficiency of more than 44% at 36.6 dBm average output power at center frequency of operation. The adjacent channel power ratio is better than -45 dBc after applying digital predistortion. The circuit is realized with microstrip technology, which can be easily fabricated using conventional printed circuit processes. © 2015 Wiley Periodicals, Inc. Int J RF and Microwave CAE 25:655-674, 2015.