Bandwidth Enhancement of Three-Stage Doherty Power Amplifier Using Symmetric Devices

Abstract

This paper proposes a design scheme for extending the bandwidth of a three-stage Doherty power amplifier (DPA) based on symmetric devices for broadband applications. The proposed bandwidth enhancement scheme provides an optimized solution for the load combiner parameters while operating the auxiliary power amplifier (PA) at lower current values as compared to the main PA at saturation. The proposed scheme promises 30.3% fractional bandwidth in terms of efficiency enhancement up to 9.54-dB back-off. The proposed design methodology is validated with the design of a broadband three-stage DPA using three 10-W packaged GaN HEMT devices. Measurement results show more than 51.6% drain efficiency at 6-dB output power back-off (OPBO) over the entire frequency range from 700 to 950 MHz. At 9.54-dB OPBO, the drain efficiency is better than 50.2% over this 250-MHz band. The peak drain efficiency at saturation is better than 60.04% over the entire band of operation. Measurement with 5-MHz WCDMA modulated signal shows the average drain efficiency of about 57.6% at 33.97-dBm average output power at the center frequency of operation. The corresponding adjacent channel power ratio is better than ${-}{\hbox{45.6}}$ dBc after applying digital predistortion. The circuit is realized with microstrip technology, which can be easily fabricated using conventional printed circuit processes.