Design of CNFET based power- and variability-aware nonvolatile RRAM cell

Abstract

In this paper a Power– and Variability–Aware Nonvolatile RRAM Cell (4CNFET2M) is presented. Memristor is used as a nonvolatile memory element. We have compared our proposed cell with standard 6T SRAM (S6T) cell and 2T2M RRAM cell (state of the art design based on memristor). The proposed cell shows 1.26 × /3.61 × shorter read delay/write delay variability compared to 2T2M. 4CNFET2M also shows 1.39 × narrower read delay variability compared to S6T. Furthermore, the proposed cell shows 6.4 × shorter write delay in comparison to 2T2M RRAM cell. 4CNFET2M consumes 106 × /2.02 × lower power during hold mode compared to conventional S6T SRAM/2T2M RRAM cell. Furthermore, the proposed cell also shows improvement in hold power variability compared to both the cells. All the simulated data, presented here, are for 1 V supply voltage. These improvements are achieved because of using the memristor and CNFET technology. These benefits are obtained at a cost of slightly longer read delay compared to 2T2M/S6T and 33.6 × longer write delay compared to S6T.