A 4-bit active-inductor-based digitally programmable low noise amplifier (AI-DPLNA) with a tunable and reconfigurable structure

Abstract

In this paper, a band selective, active-inductor-based digitally programmable low noise amplifier (DPLNA) with a reconfigurable structure is presented. The reconfigurablility of the DPLNA is provided by a programmable current steering network, size-scalable cascode core, and input matching network, which are merged together, and along with a programmable active inductor (AI) as a replacement to huge passive inductors, a compact reconfigurable AI-DPLNA structure is achieved. The size-scalable source degenerated cascode structure is used as the core of the proposed DPLNA, and as a part of current steering network, its output current is reused for biasing the programmable active inductor (AI), which acts as the tank circuit for a narrow-band operation. The operation frequency of DPLNA is controlled by AI load and input matching circuit. A 2-bit programmable current steering network combined with the size-scalable cascode core set the operation frequency of the AI by adjusting its transconductance. Another 2-bits control the AI’s capacitance and also configure the input matching network. Using a TSMC 0.18μm CMOS technology, the simulated 4-bit AI-DPLNA gives a frequency band in the range from 1.816 GHz to 2.631 GHz, an input return loss (LRT) greater than 16.37 dB, a gain (S21) from 11 to 12.57 dB, and a minimum noise figure from 2.6 to 4.2 dB. It consumes a power of 11.4 mW to 12.3 mW from a 2 V supply, and occupies a silicon area of 0.0135 mm2. In addition to PVT and post layout simulations, a prototype of the DPLNA is implemented and tested using through-hole parts to verify the reconfigurability of the proposed structure.