Design of a novel CMOS/MTJ-based multibit SRAM cell with low store energy for IoT applications

Abstract

ABSTRACTWith rapid growth of Internet of Things, more and more devices are getting connected, which results in generation of large amount of data. To convert this collected raw data into useful information, it needs to be processed. However, during processing a significant amount of energy is spent in bringing data from off-chip non-volatile memory to on-chip memory. In addition, these devices are generally operated in ‘Normally OFF’ mode, which requires energy intensive boot process for waking up. Addressing these issues, Magnetic Tunnel Junction offers features like non-volatility and high integration density, which allows storage of data and instruction closer to the core. Therefore, this work proposes a hybrid multibit SRAM cell, which integrates MTJ with conventional 6T SRAM cell. The proposed SRAM cell supports multiple bit storage within a single cell. However, one of the critical issues with the MTJ is high-energy consumption while storing data. Hence, we also propose a store assist circuit for multibit SRAM cell, which asynchronously terminates the store operation after its completion to reduce the power consumption. Our simulation results show that the store assist circuit results in reduction of store energy by 35% and 72% when compared with existing multibit non-volatile SRAM.