Design for testability and built-in self-test for VLSI circuits

Abstract

The special characteristics of VLSI and VHSI (very high-speed integrated) circuits - their high speed of operation and their poor accessibility to external probing — have aggravated the problems of test-pattern generation and testing. As circuit technologies advance to higher speeds and larger scales of integration, new approaches will be required to test the high speed and very dense circuits which may contain both multiple ‘stuck’ type and non ‘stuck’ type faults. Hence, it might be necessary to consider testing approaches in a new light. This paper surveys built-in self-test approaches, which seem to be preferred over external testing and have a good potential for future testing requirements. Built-in self-test schemes implemented in microprocessor-based systems are highlighted.