Defect generation in ultra-thin SiO 2 gate layers and SiO 2/ZrO 2 gate stacks and the dispersive transport model

Abstract

The generation of defects in ultra-thin SiO 2 gate layers and SiO 2/ZrO 2 gate stacks is studied through the time-dependent current density variation Δ J G ( t)= J G ( t)− J G (0) observed during constant gate voltage stress of MOS capacitors. The time dependence of the defect density variation Δ N ot is calculated within a dispersive transport model, assuming that these defects are produced during the random hopping transport of positively charged species in the insulating layer. The stress voltage and gate insulator thickness dependence of Δ J G ( t) can be very well reproduced by this model, and the values obtained for the fitting parameters are close to those pertaining to the dispersive transport of H +.