Dielectric Relaxation and Defect Generation Under Pulsed and Constant Voltage Stressing of Ultrathin TiO2 Films on Strained-Si/Si0.8Ge0.2

Abstract

Ultra-thin high-k TiO2 (~11 nm) films have been deposited on strained-Si/relaxed-SiGe heterolayers using microwave plasma below 200ºC using organo-metallic precursor titanium isopropoxide (TTIP). Dielectric relaxation and oxide reliability studies have been performed with constant voltage stressing. During constant voltage stressing of MIS capacitors, an increase in time-dependent gate current is observed followed by occurrence of current fluctuations. The amplitude of fluctuations increases with increasing stress voltage. A comparative study on the time dependent defect density variation, ΔNhigh-k is performed within a dispersive transport model, assuming that the defects are produced during random hopping transport of defects in the insulating layer. Effects of transient response and dielectric relaxation have been studied under high pulse voltage stress. Stress induced trap charge density and its spatial distribution have also been investigated.