Cost-Effective Reliable Edge Computing Hardware Design Based on Module Simplification and Duplication: A Case Study on Vehicle Detection Based on Support Vector Machine

Abstract

Autonomous vehicles and advanced driver assistance systems (ADAS) have recently become quite popular research topics. While autonomous vehicles may not be totally ready now, ADAS has been applied to many vehicles. The implementation of ADAS partly relies on detection of vehicles via edge computing. However, the edge computing hardware may age and incur functional errors. Soft errors may also be caused due to cosmic charged particles. These errors may invalidate the vehicle detection result, thereby incurring serious safety threats. In this paper we investigate on designing a cost-effective reliable edge computing circuit. A case study on vehicle detection is considered where a support vector machine is implemented for illustration purpose. We find that in edge computing hardware, several multiplier-accumulator (MAC) units can be removed without sacrificing detection accuracy. A simple yet effective procedure is also proposed to identify such MAC units. The saved hardware can then be utilized to protect the remaining hardware, reducing the required hardware cost. Numeric fault simulations are first performed to identify which circuit lines need to be protected such that there is no loss on the vehicle detection accuracy due to faults. Then, for these lines, proper protection methods are investigated based on evaluation of their required hardware cost and fault-induced accuracy loss. Accordingly a hybrid protection scheme is developed, which achieves up to 153% hardware cost reduction when compared to the typical TMR-based protection method.