Abstract
In this paper we described a complete methodology to extract the RF performance of ‘real’ compound FETs from time domain Ensemble Monte-Carlo (EMC) simulations which can be used for practical device design. The methodology is based on transient finite element EMC simulation of realistic device geometry. The extraction of the terminal current is based on the Ramo-Shockley theorem. Parasitic elements like the gate and contact resistances are included in the RF analysis at the post-processing stage. Example of the RF analysis of pseudomorphic HEMTs illustrates our approach.
Highlights
The remarkable RF performance of compound FETs such as GaAs MESFETs and InGaAs HEMTs with channel lengths down to 0.1 lam is due to well pronounced velocity overshoot, The use of simulation for predictive analysis and design of such devices require in many cases the employment of full scale Ensemble Monte-Carlo (EMC) technique [1,2,3]
In this paper we describe a methodology based on the EMC simulation to investigate the RF performance of FETs
TABLE Small signal equivalent circuit components calculated from the EMC simulations, Vg =-0.2 and Va 1.5 V
Summary
The remarkable RF performance of compound FETs such as GaAs MESFETs and InGaAs HEMTs with channel lengths down to 0.1 lam is due to well pronounced velocity overshoot, The use of simulation for predictive analysis and design of such devices require in many cases the employment of full scale EMC technique [1,2,3]. Most of the published EMC studies of compound FETs consider simplified device geometry and focus mainly on the transport physics and the effect of the enhanced channel velocity on the DC device characteristics. Far more important for the proper design of modern short channel compound FETs is the RF performance which is determined by the high field transport and by the device geometry and the surface effects. The device parasitics are included through the proper finite-element description of the gate and recess shapes. The external parasitics are included in the post-processing stage
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