Combined hierarchical placement algorithm for row-based layouts

Abstract

A hierarchical placement algorithm which combines mincut partitioning and simulated annealing has been developed. The objective of mincut partitioning is to minimise the number of crossing nets, while the objective of placement by simulated annealing is usually to minimise the total estimated wire length. The combined placement algorithm can optimise both the routing density and the estimated wire length. For efficiency, the placement is performed using multiple levels of hierarchy in the top-Klown direction. Several standard-cell and sea-of-gates (SOG) circuits are placed using this algorithm and promising results are obtained.