Abstract

A hierarchical placement algorithm which combines mincut partitioning and simulated annealing has been developed. The objective of mincut partitioning is to minimize the number of crossing nets while the objective of placement by simulated annealing is usually to minimize the total estimated wire-length. The combined placement algorithm can optimize both the routing density and the estimated wire-length. For efficiency, the placement is performed using multiple levels of hierarchy in the top-down direction, i.e., big groups of cells are placed at the beginning and leafcells are placed at the final level. Several standard-cell and sea-of-gates circuits are placed using the combined placement techniques and promising results are obtained when compared with those of several other placement methods.

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