Abstract
This chapter focuses on power estimation in field programmable gate arrays (FPGAs). Power estimation and analysis techniques have turned out to be huge challenges for both FPGA vendors and designers. Power characterization is an important step in designing power efficient FPGA architectures and FPGA applications. FPGA designers need a method to quantify the power advantage of the architectural design decisions without having to go through fabrication. Moreover, FPGA users need to check the power efficiency of the several possible implementations without actually going through the lengthy design phase. Power characterization is an important step in designing power efficient FPGA architectures and FPGA applications. FPGA designers need a method to quantify the power advantage of the architectural design decisions without having to go through fabrication. Moreover, FPGA users need to check the power efficiency of the several possible implementations without actually going through the lengthy design phase.
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