Chapter 15 - Digital Signal Processing

Abstract

This chapter discusses the architectural features developed for implementing digital signal processing (DSP) functions within field-programmable gate arrays (FPGAs) and algorithms that can be more efficiently implemented within FPGA using these features. Design flow, critical design decisions, terminology, numeric representation, and arithmetic operations are discussed in the chapter. The chapter presents a high-level overview of a typical DSP system and its critical elements. DSP is a specialized technology with many important concepts referenced by acronyms and specialized terms. The chapter provides definitions for important DSP terms and abbreviations. The traditional sequential-instruction DSP processors have evolved toward architectures that allow them to implement a broad range of DSP functions at an affordable price point. The majority of currently available popular DSP processors are inherently general-purpose devices by design. Higher-performance and resource-hungry MAC-intensive DSP algorithms may benefit from implementation within FPGA components. FPGA architectural enhancements, development tool flow advances, speed increases, and cost reductions are making implementation within FPGAs increasingly attractive. The potential advantages in implementing a DSP function within an FPGA include performance improvements, design implementation flexibility, and higher system-level integration. The FPGA-based signal processing performance may be improved through a combination of design adjustments. Some of the FPGA design issues that are important to signal processing algorithm implementation are presented in the chapter. These design factors must be carefully implemented to achieve the highest levels of performance and fastest design implementation. The chapter also illustrates an example of finite impulse response (FIR) filter concept.