Abstract

In modern integrated circuits the number of devices have strongly increased. As a result, identifying the issues which have an impact on their performance stands out as a very complicated and challenging problem. In digital integrated circuits there are methods which are known, as well as some others which are in the active development stages targeted to enable the built-in self-tests, identify, and report those issues. At that, for mixed signal circuits, where the calculations or functions are performed based on the voltage levels, it is much complicated to develop self-testing mechanisms. A novel method of identifying the lack of clock signal and its duty cycle variation is proposed in this paper. The developed architectures and solutions are capable of detecting the lack of the clock signals, as well as informing the digital parts of the systems about the requirement for the coarse or fine tunings of the clock generation systems outside their autocalibration and loops.

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