Abstract
In modern integrated circuits the number of devices have strongly increased. As a result, identifying the issues which have an impact on their performance stands out as a very complicated and challenging problem. In digital integrated circuits there are methods which are known, as well as some others which are in the active development stages targeted to enable the built-in self-tests, identify, and report those issues. At that, for mixed signal circuits, where the calculations or functions are performed based on the voltage levels, it is much complicated to develop self-testing mechanisms. A novel method of identifying the lack of clock signal and its duty cycle variation is proposed in this paper. The developed architectures and solutions are capable of detecting the lack of the clock signals, as well as informing the digital parts of the systems about the requirement for the coarse or fine tunings of the clock generation systems outside their autocalibration and loops.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.