Abstract
A new set of boundary conditions is proposed which allows Monte Carlo (MC) calculations to be carried out accurately in preselected regions of a device structure, thus avoiding impractically long computation time. This technique has been applied to three different silicon device structures: an n-p junction, a 0.3-µm basewidth n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -n-n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> diode, and an n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -p-n-n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> bipolar-transistor structure with a 0.1-µm basewidth. The results indicate difficulties with the MC method when applied to regions where a large retarding field exists. A comparison of the results where both the entire device structure can be analyzed and the "regional" MC calculation can be performed, using the proposed boundary conditions, shows good agreement. The computation time using the regional approach, however, is substantially less.
Published Version
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