BCl3/Cl2 plasma etching process to fabricate a ferroelectric gate structure for device integration

Abstract

Despite the significant potential of ferroelectric devices in overcoming the challenges faced by conventional high-k-based CMOS devices owing to the scaling of CMOS processes, most ferroelectric devices are not implemented in practical circuits yet. For practical application, integrating them into a circuit is essential, and the development of a reliable etching process is crucial for the integration of individual devices into circuits. Therefore, this study proposes a process for etching hafnium zirconium oxide (HZO)-based gate stacks to fabricate a gate structure and integrate HZO-based devices into circuits. First, poly-Si/TiN/HZO/TiN/SiO2 was deposited on a Si substrate and etched via Cl2 and BCl3/Cl2 plasma etchings. Cl2 plasma etching was found to be less effective, whereas BCl3/Cl2 plasma etching exhibited a higher etching rate. The optimal etching time for the BCl3/Cl2 plasma at which the entire stack was successfully removed was 50 s. Furthermore, the optimal ratio of Ar:Cl2:BCl3 that resulted in minimal damage to the Si surface was determined to be 1:1:3. These results led to the successful formation of an HZO-based gate structure and provided the potential to integrate ferroelectric devices into the circuit, thereby enabling their practical utilization.