Aspects of Bonding Processed CMOS Wafers

Abstract

This paper will give an overview of special aspects and requirements of the back-end of line bonding of processed CMOS wafers. Due to the high complexity of this type of wafer, there are limitations in the bonding process, such as thermal budget or usable chemicals, which must be considered in the choice or development of bonding techniques. On the other hand, the bonding of extensively processed wafers is always challenging, due to the negative influences of wafer processing on the surfaces to be bonded, such as increased roughness and surface topology. These special aspects will be discussed, both generally and for some specific wafer bonding processes, in order to finally determine the general requirements of bonding processes suitable for CMOS wafers.