Abstract
Model help to understand the system there may be a signal reflection and impedance matching problem. Most fiber integrated circuits from Maxim use Current Mode Logic (CML), Positive Emitter Coupled Logic (PECL), and Low Voltage Differential Signal (LVDS) I/O formats. Language can be set up through the PSpice circuit model of the IC, with an ideal voltage controlled current source of alternative sources and active circuit elements. And the use of spice macro-model simulation to test the circuit performance of the chip interface design. In this paper, it takes the model of amplifier IC in GPON receiver front-end for example to shows the steps and importance of interface simulation in GPON system by PSpice macro-model.
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