Abstract
In this paper, the voltage level of the negative falling ramp in the reset waveform is lower, the accumulated wall charges during the ramp-up period are more erased between A-Y electrodes, thus, reducing the number of wall charges prior to address discharge. In particular, the measured Vt closed-curves and the weak and strong discharge characteristics corresponding IR emission profiles show that fewer wall charges prior to an address discharge induce a decrease in the statistical time lag during the address period. The discharge transient contours of simultaneous discharges are changed by the wall voltage states after reset discharge, thereby influencing the statistical discharge time lag of the address discharge for the stable drive, thereby resulting in stable and fast addressing.
Published Version
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