Analysis of Photon-Induced Drain Current in Polycrystalline-Silicon Thin-Film Transistors

Abstract

The electrical properties of illuminated polycrystalline-silicon thin-film transistors (poly-Si TFTs) were investigated by measurement and device simulation. Several features were revealed in n-channel poly-Si TFTs: the flat-band voltage (Vfb) shifts to a positive direction on the order of 0.1 V. The trap density increases around the midgap. In the on-state, the grain boundary barrier height slightly decreases owing to the increase in donor-type and the decrease in acceptor-type trap densities. In the off-state, the reverse current of pn-junction at the drain edge becomes much larger than the generation current or gate-induced drain leakage current, showing almost linear dependence on light intensity. A hump appears in off-current below Vfb, which is derived from the transition of carrier transport from the reverse diffusion at pn-junction in the off-state to the drift-diffusion in the on-state. Considering all these features, a surface-potential-based drain current model was proposed. Calculations using the model were compared with device simulation and measurement by varying the light intensity or drain voltage. The good agreements between them confirm the validity of the model.