Analysis of performance for novel pocket-doped NCFET under the influence of interface trap charges and temperature variation

Abstract

This paper explores the DC characteristics and trap analysis of single gate NCFET (SG-NCFET) and highly doped double pocket double gate NCFET (HDDP-DG-NCFET) with spacer at different temperatures. The effect of temperature and the trap charges (Uniform and Gaussian) on various electrical parameters is investigated to determine the device's reliability. In addition, this work investigates the effect of interface (Si–SiO2) traps on the operation of NCFET, a potential developing technology that intends to achieve a steep sub-threshold slope. The presence of traps at interface degrades threshold voltage and sub-threshold swing. Hence, the work investigates the effect of various concentrations of trap at the oxide-semiconductor boundary on the sub-threshold swing, ON current, threshold voltage, OFF current, and current switching ratio of both the devices (SG-NCFET and HDDP-DG-NCFET). In this analysis, it has been observed that, sub-threshold slope (SS) increases with the temperature more rapidly than kT/q, representing the paraelectric effect, and surpasses kT/q after 450 K and 500 K for SG-NCFET and HDDP-DG-NCFET, respectively. Furthermore, it has been observed that the impact of temperature variation is greater on the switching ratio of the device in the presence of trap charges, while the opposite is valid for the OFF current. Finally, it is found that the Gaussian distribution of traps worsen the SS characteristics and ON-OFF current ratio of the device severely as compared to the uniform distribution of traps.