Analysis of frequency-dependent series resistance and interface states of In/SiO 2/p-Si (MIS) structures

Abstract

In this work, the investigation of the interface state density and series resistance from capacitance–voltage ( C– V) and conductance–voltage ( G/ ω− V) characteristics in In/SiO 2/p-Si metal–insulator–semiconductor (MIS) structures with thin interfacial insulator layer have been reported. The thickness of SiO 2 film obtained from the measurement of the oxide capacitance corrected for series resistance in the strong accumulation region is 220 Å. The forward and reverse bias C– V and G/ ω− V characteristics of MIS structures have been studied at the frequency range 30 kHz–1 MHz at room temperature. The frequency dispersion in capacitance and conductance can be interpreted in terms of the series resistance ( R s) and interface state density ( D it) values. Both the series resistance R s and density of interface states D it are strongly frequency-dependent and decrease with increasing frequency. The distribution profile of R s– V gives a peak at low frequencies in the depletion region and disappears with increasing frequency. Experimental results show that the interfacial polarization contributes to the improvement of the dielectric properties of In/SiO 2/p-Si MIS structures. The interface state density value of In/SiO 2/p-Si MIS diode calculated at strong accumulation region is 1.11×10 12 eV −1 cm −2 at 1 MHz. It is found that the calculated value of D it (≈10 12 eV −1 cm −2) is not high enough to pin the Fermi level of the Si substrate disrupting the device operation.