The C– V– f and G/ ω– V– f characteristics of Au/SiO 2/n-Si capacitors

Abstract

Au/SiO 2/n-Si metal–insulator-semiconductor (MOS) structures with thermal growth oxide layer have been fabricated. The frequency dependence of capacitance–voltage ( C– V) and conductance–voltage ( G/ ω– V) characteristics of these structures have been investigated taking into account the effect of the series resistance and interface states. The C– V and G/ ω– V measurements have been carried out in the frequency range of 1 kHz–1 MHz at room temperature. The frequency dispersion in capacitance and conductance can be interpreted in terms of the interface states density ( N ss) and series resistance values ( R s). The interface states can follow the ac signal and yield an excess capacitance especially at low frequencies. The values of measured C and G/ ω decrease in depletion region with increasing frequencies especially in low frequencies due to a continuous density distribution of interface states. The C– V plots exhibit anomalous peaks due to the N ss and R s effect. It has been experimentally found that the peak positions in the C– V plot shift towards positive voltages and the peak value of the capacitance decreases with increasing frequency. The effect of series resistance on the capacitance is found appreciable at high frequencies due to the interface state capacitance decreasing with increasing frequency. In addition, the high-frequency capacitance ( C m) and conductance ( G m/ ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance. Experimental results show that the locations of interface states between Si/SiO 2 and series resistance have a significant effect on electrical characteristics of MOS structures.