Characterization of interface states at Au/SnO 2/n-Si (MOS) structures

Abstract

The purpose of this paper is to characterize the interface states in Au/SnO 2/n-Si (MOS) structures. The characteristic parameters of the interface states are derived from capacitance–voltage ( C– V) and conductance–voltage ( G/ ω– V) measurements as a function of frequency. The C– V and G/ ω– V measurements have been carried out in the frequency range of 1 kHz to 1 MHz at room temperature. At each frequency, the measured capacitance and conductance decrease with increasing frequency due to a continuous distribution of the interface states. The frequency dispersion in capacitance and conductance can be interpreted in terms of the interface state density ( N ss) and series resistance ( R s). Especially at low frequencies, the interface states can follow the ac signal and yield an excess capacitance. Due to a continuous density distribution of interface states, the C and G/ ω values decrease in depletion region with increasing frequencies. At high frequencies, the effect of series resistance on the capacitance is found appreciable due to the interface state capacitance decreasing with increasing frequency. Experimental results show that the locations of interface states between SnO 2/Si and series resistance have a significant effect on electrical characteristics of MOS structures.