Abstract
This paper introduces a novel voltage sense amplifier (VSA) in fully depleted (FD) double-gate (DG) silicon-on-insulator (SOI) technology with planar independent self-aligned gates. Three different architectures are described and their operation margins are analyzed as a function of transistor length (L) and threshold voltage (Vth) variations and mismatch. The proposed architecture takes advantage of the back gate to enhance feedback and add more input nodes to provide a faster (25%-40%) and more insensitive to mismatch (100%-300%) circuit.
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