Abstract
A novel low dropout regulator (LDO) is proposed in this paper which has high power supply rejection ratio (PSRR) in a wide frequency range and its transient response performance is also improved. In order to get good performance on PSRR, a full differential folded cascode structure error amplifier is used, which also increases the precision of the proposed LDO. A transient enhancement circuit unit (TEU) is used in the proposed LDO to achieve a good transient response performance and proved to be effective by the simulation results. Frequency compensation technologies are also used to ensure the LDO system is stable when it works normally. The LDO structure is implemented and simulated with HSPICE using a standard 0.35μm CMOS process. Simulation results show that the circuit provides a high PSRR which is up to 51.5dB at 100 KHz and 50dB at 1MHz, the load transient response time and overshoot and undershoot voltage are all decreased when the load current changes from 1mA to 100mA in 0.1μs and recover to 1mA several microseconds later.
Published Version
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