Abstract
An analog low dropout regulator (LDO) that can operate at ultra-low voltage (ULV) with high power supply rejection ratio (PSRR) is presented in this brief. The supplies of the error amplifier and the power stage in this LDO are separated, and a lightweight local generated supply (LLGS) is proposed to guarantee the proper function of the associated error amplifier in ULV mode. This LLGS assisted analog LDO has been experimentally verified in 0.13 μm CMOS technology and it only occupies an active area of 0.035 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Measurement results indicate that this LDO can achieve greater than 30 dB PSRR up to 10 kHz at supply voltage as low as 0.5 V.
Published Version
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