Abstract
A transport model which consistently takes into account carrier and lattice heating is proposed for silicon bipolar transistor simulations. Unlike earlier nonisothermal and hot-carrier transport formulations, neither the carrier temperatures nor the device (lattice) temperature is required to be uniform. Their spatial dependence is determined from the corresponding energy balance equations. The two previous transport approaches are coupled by a new lattice heat generation model which accounts for mutual energy transfers among the carriers and the lattice through their temperature differences. By applying this model to the heat flow equation, hot-carrier induced lattice heating for a submicron npn structure is simulated. The effect of lattice heating on electron temperature distributions is discussed. Our simulation is also able to predict velocity overshoot and the Kirk effect. To study the problem of device heating, the effects on the lattice temperature due to thermal boundary characteristics and the proximity of heat sinks to the base-collector junction are investigated numerically. Device characteristics are also compared with those obtained from SEDAN.
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