A sub-10nm U-shape FinFET design with suppressed leakage current and DIBL effect

Wei-Chao Zhou Wei-Chao Zhou,Peng-Fei Wang Peng-Fei Wang,David Wei Zhang David Wei Zhang

doi:10.1109/cstic.2015.7153322

A sub-10nm U-shape FinFET design with suppressed leakage current and DIBL effect

Wei-Chao Zhou Wei-Chao Zhou, Peng-Fei Wang Peng-Fei Wang + Show 1 more

https://doi.org/10.1109/cstic.2015.7153322

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Publication Date: Mar 1, 2015

Citations: 7

Affiliation: Shanghai Fudan Microelectronics (China), Fudan University

#Drain Induced Barrier Lowering #Fin Field-effect Transistor + Show 8 more

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Abstract

In this paper, a U-shape fin field-effect transistor (U-FinFET) is proposed for sub-10nm technology and low power applications. Compared with the conventional tri-gate fin field-effect transistor (FinFET), this structure has the advantages of relatively low off-state channel leakage current (I off ) and sub-threshold swing (SS). By using Sentaurus TCAD simulations, it is found that the U-shape channel can also suppress the drain induced barrier lowering (DIBL) effect.

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