Abstract
A simple analytical model for deriving the front and the back gate threshold voltages of a short-channel fully-depleted SOI MOSFET is presented. Taking into account the lateral variations of the front and the back surface potentials, we obtain two-dimensional potential distributions in the fully depleted silicon body, the front oxide layer, and the back oxide layer. From the obtained two- dimensional potential in the silicon body, the minimum values of both front and back surface potentials are derived and used to describe both front and back gate threshold voltages as closed-form expressions in terms of various device geometry parameters and applied bias voltages. Obtained results are found to be in good agreement with the numerically simulated results.
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