A reply to "Comments on 'small geometry MOS Transistor capacitance measurement method using simple on-chip circuits'"

J.E Orisian,H Iwai,J.T Walker,R.W Dutton

doi:10.1109/edl.1985.26043

A reply to "Comments on 'small geometry MOS Transistor capacitance measurement method using simple on-chip circuits'"

J.E Orisian, H Iwai + Show 2 more

https://doi.org/10.1109/edl.1985.26043

Copy DOI

Export

Save

Cite

Journal: IEEE Electron Device Letters	Publication Date: Jan 1, 1985
Citations: 1

Affiliation: Stanford University, Toshiba (Japan)

#Simple On-chip Circuits #MOS Transistor Capacitance #On-chip Transistor #On-chip Method #On-chip Capacitance #Small Transistor #On-chip Measurement #Small Capacitance #Simple Circuits #Small Geometry MOS

Abstract
Full-Text
Similar Papers

Abstract

Listen

Internodal MOS transistor capacitances are described from a measurement perspective. The on-chip MOS transistor capacitance measurement method, previously reported, is discussed as an application of internodal capacitance theory.

Full Text

Published Version

Check institute access

Open DOI Link

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Similar Papers

Paper Title

Journal

Date

Author

View more papers

More From: IEEE Electron Device Letters

Paper Title

Journal

Date

Author

View more papers

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.

R Discovery Prime

A reply to "Comments on 'small geometry MOS Transistor capacitance measurement method using simple on-chip circuits'"