Abstract
The major issue of RRAM is the uneven sneak path that limits the array size. For the first time record large One-Resistor (1R) RRAM array of 128x128 is realized, and the array cells at the worst case still have good Low-/High-Resistive State (LRS/HRS) current difference of 378 nA/16 nA, even without using the selector device. This array has extremely low read current of 9.7 μA due to both low-current RRAM device and circuit interaction, where a novel and simple scheme of a reference point by half selected cell and a differential amplifier (DA) were implemented in the circuit design.
Highlights
The RRAM implemented in crosspoint array structure promises high scalability and 3D architecture
The proposed architecture determines the state of RRAM cell in an array by considering the current through Half Selected Cells (HSC) and current slope of the Full Selected Cell (FSC)
The impact of sneak path increases with the array size and has more impact on WCLthan WCH. This is because WCL has all the cells at LRS in HSC state (LRSHSC); these LRSHSCs leak more current through sneak path via resistive network to the selected BL
Summary
The RRAM implemented in crosspoint array structure promises high scalability and 3D architecture. This RRAM cell offers large HRS/LRS ratio that is crucial to reach a large size memory array. Such high resistance values are crucial to save the read power in a large RRAM array.
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