Abstract
In order to improve the integrability with vertical MOS processes, a new HCBT process is developed, fabricated and presented in this work for the first time. Its fabrication process is simplified mainly by reducing the number of lithography masks to 5 (including 1 metal layer), using CMP and etch-back techniques for isolation and the reduction of parasitic capacitances, and self-aligned base implantation. Also, a new HCBT technology is applicable to both bulk Si and SOI substrates, whereas the existing lateral bipolar transistors (LBTs) are processed exclusively on SOI.
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