Abstract

A novel diode-clamped carrier stored trench bipolar transistor (CSTBT) with improved performances is proposed. The improvement has been achieved by introducing a P-layer region under the trench gate, which is connected to the cathode electrode through two integrated series diodes. In the blocking-state, almost all of the reverse voltage is sustained by P-layer/N-drift junction, which makes the doping concentration of the carrier stored layer is independent of the breakdown voltage, thus overcoming the inherited on-state versus breakdown tradeoff appearing in conventional CSTBT. Furthermore, drain-to-source voltage of the NMOS in the channel region is clamped by the two integrated series diodes in the on-state, resulting in an ultra-low saturation current of the proposed CSTBT. The simulation results show that the saturation current and on-state voltage drop of the proposed CSTBT are reduced by 72.6% and 29.1% respectively, compared with the conventional one.

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