A Low-Power High-PSRR Clock-Free Current-Controlled Class-D Audio Amplifier

Abstract

A low power, high PSRR, clock-free, current-controlled class-D audio power amplifier is presented. The proposed audio amplifier utilizes integral sliding mode control (ISMC) to ensure robust operation and to minimize the steady-state error. This architecture has two feedback loops: an outer voltage loop that minimizes the voltage error between the input and output audio signals, and an inner current loop that measures the inductor current to track the input signal accurately. The proposed amplifier achieves up to 82 dB of power supply rejection ratio (PSRR), more than 90 dB of signal-to-noise (SNR) ratio over the entire audio band, and total harmonic distortion plus noise (THD+N) as low as 0.02%. A power-supply-induced intermodulation distortion (PS-IMD) of approximately - 90 dBc was measured for an input voltage signal of 2 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> at 1 kHz and a sinusoidal power-supply ripple of 300 mV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> at 217 Hz superimposed on the DC level. The IC prototype's controller consumes 30% less power than those of recently published works. The audio amplifier operates with a 2.7-V single voltage supply and delivers a maximum output power of 410 mW with 84% peak efficiency (η) into an 8 Ω speaker. It was fabricated using 0.5 μm CMOS standard technology, and occupies a total active area of 1.65 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .