A High Gain and High Harmonic Rejection LNA Using High Q Series Resonance Technique for SDR Receiver

Abstract

This paper presents a high gain and high harmonic rejection low-noise amplifier (LNA) for software-defined radio receiver. This LNA exploits the high quality factor (Q) series resonance technique. High Q series resonance can amplify the in-band signal voltage and attenuate the out-band signals. This is achieved by a source impedance transformation. This technique does not consume power and can easily support multiband operation. The chip is fabricated in a <TEX>$0.13-{\mu}m$</TEX> CMOS. It supports four bands (640, 710, 830, and 1,070MHz). The measured forward gain (<TEX>$S_{21}$</TEX>) is between 12.1 and 17.4 dB and the noise figure is between 2.7 and 3.3 dB. The IIP3 measures between -5.7 and -10.8 dBm, and the third harmonic rejection ratios are more than 30 dB. The LNA consumes 9.6 mW from a 1.2-V supply.