A Determinate Radiation Hardened Technique for Safety-Critical CMOS Designs

Abstract

Soft errors have been a critical concern for reliability of advanced CMOS designs due to technology scaling. Moreover, along with the rapid growth of medical, automotive, and aerospace electronics, extremely high demand on reliability becomes the paramount concern, superior to cost and performance, on these safety-critical designs. Triple modular redundancy (TMR) is widely used to mask virtually all soft errors but typically incurs high power and area overheads. Therefore, in this paper, a determinate radiation hardened technique for safety-critical CMOS designs is proposed and consists of three hybrid strategies combining gate sizing, supply voltage (V D D ) scaling and threshold voltage (V t h ) scaling to prevent soft errors from occurring. A STA-like method that computes the required pulse width of a transient fault along the propagation path is also developed in this framework. Simulation results show that the proposed technique can effectively eliminate all soft errors on ISCAS'85 circuits and a controller area network bus electrical control unit (CAN-bus ECU) design for automotive electronics when the deposited charges range from 35 fC to 132 fC. Furthermore, the strategy using all three techniques, simultaneously improves power and area overheads by 3.3X and 2X, respectively, compared with TMR.