A 5.79‐dB NF, 30‐GHz‐band monolithic LNA with 10 mW power consumption in standard 0.18‐μm CMOS technology

Abstract

AbstractA 30‐GHz (Ka‐band) low‐noise amplifier (LNA) with 10 mW power consumption (PDC) using standard 0.18‐μm CMOS technology was designed and implemented. To achieve sufficient gain, this LNA was composed of three cascade common‐source stages, and a series peaking inductor (Lg3) was added to the input terminal of the third stage to boost the peak gain (S21‐max) from 11.7 (at 28.8 GHz) to 14.5 (at 28 GHz), i.e., 23.9% (simulation). Shunt RC feedback was adopted in the third stage for achieving good output impedance matching. At 30 GHz, this LNA achieved excellent input return loss (S11) of −19.5 dB, output return loss (S22) of −23.8 dB, forward gain (S21) of 11.1 dB, reverse isolation (S12) of −49.2 dB, and noise figure of 5.79 dB. The corresponding gain/PDC was 1.11, which is better than those of the CMOS LNAs around 30 GHz reported in the literature. The measured input‐referred 1‐dB compression point (P1dB‐in) and input third‐order intermodulation point (IIP3) were −10.9 and −2 dBm, respectively. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 933–937, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24250