A 4.9-dB NF 53.5- to 62-GHz micromachined CMOS wideband LNA with small group-delay-variation

Abstract

A 53.5- to 62-GHz wideband low-noise amplifier (LNA) with excellent phase linearity property using standard 0.13 μm CMOS technology is reported.To achieve sufficient gain, the LNA is composed of six cascade common-source stages. Current-sharing technique is adopted to reduce power dissipation. The LNA (STD LNA) consumed 29.1 mW and achieved input return loss (S11) of −10.3 to −19.5 dB, output return loss (S22) of −13.8 to −27.8 dB, forward gain (S21) of 8.1 to 11.1 dB, and reverse isolation (S12) of −49.9 to −60.2 dB over the 53.5- to 62-GHz-band. The minimum NF (NFmin) is 5.4 dB at 62 GHz. To reduce the substrate loss, the CMOS process compatible backside inductively-coupled-plasma (ICP) deep trench technology is used to selectively remove the silicon underneath the LNA. After the ICP etching, the LNA (ICP LNA) achieved maximum S21 (S21-max) of 13.2 dB (at 58 GHz), 2.1 dB higher than that (11.1 dB) of the STD LNA (at 58.5 GHz). In addition, the ICP LNA achieved NFmin of 4.9 dB (at 61 GHz), 0.5 dB lower than that (5.4 dB) of the STD LNA (at 62 GHz). These results demonstrate the proposed LNA architecture in conjunction with the backside ICP deep-trench technology is very promising for high-performance 60-GHz-band RFIC applications. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52:2427–2432, 2010; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25500