Abstract
This chapter explores the concepts of implementing basic digital filters in VHSIC hardware description language (VHDL), where VHSIC stands for very high speed integrated circuit. The chapter provides various examples of both the building blocks and constructed filters for implementation on a Field Programmable Gate Array (FPGA) platform. The chapter discusses the process of converting S-domain to Z-domain and implementing Z-domain functions in VHDL. The chapter discusses some key concepts of the two main types of digital filters: Finite Impulse Response (FIR) and Infinite Impulse Response (IIR) filters. FIR filters are characterized by the fact that they use only delayed versions of the input signal to filter the input to the output. IIR filters are characterized by the fact that they use delayed versions of the input signal and fed back and delayed version of the output signal to filter the input to the output. The general concepts of FIR and IIR filters introduced in this chapter can help reader to implement the topology and type of filter appropriate for their own application.
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