2 - An FPGA Primer

Abstract

This chapter provides an overview of the Field Programmable Gate Array (FPGA) platform. When designing hardware, it is useful to understand the context that the hardware description language models (VHDL) are important and relevant to the ultimate design. This chapter introduces the basic technology behind FPGAs and their development. The key design issues are highlighted and some of the important design techniques introduced. The first type of devices to be programmable was Programmable Array Logic (PAL). This consists of an array of logic gates that could be connected using an array of connections. Complex Programmable Logic Devices (CPLDs) were developed to address the limitations of simple PAL devices. These devices used the same basic principle as PALs but had a series of macroblocks and connected using routing blocks. The FPGAs are the next step from CPLD. Instead of a fixed array of gates, the FPGA uses the concept of a Complex Logic Block (CLB). This is configurable and allows not only routing on the device, but also each logic block can be configured optimally.