Zone Melting Recrystallization Research Articles

Optical Recrystallization of Nanocrystalline Silicon Ribbons

The Silicon on Dust Substrate (SDS) is a gas-to-wafer process that produces multicrystalline silicon ribbons directly from gaseous feedstock (silane), avoiding the standard industry steps of polysilicon deposition, crystal growth, and wafering. The SDS technique consists of three main steps: (i) micrometric-sized silicon powder production by grinding silicon chunks; (ii) chemical vapor deposition (CVD) of silicon over this silicon powder substrate; and (iii) zone-melting recrystallization (ZMR) of the nanocrystalline pre-ribbon obtained in the CVD step. Several samples were produced by this technique. During CVD, mechanically self-sustained nanocrystalline pre-ribbons were grown over silicon powder substrates, with growth rates in the order of 50 µm/min. The ZMR process performance is substantially impacted by the pre-ribbon physical characteristics. The best and largest recrystallizations were achieved on pre-ribbons grown over powder substrates with smaller particle sizes, which also have lower substrate powder incorporation ratios. Multicrystalline silicon ribbons with crystalline areas as large as 2 × 4 cm2 were successfully produced. These areas have visible columnar crystal growth with crystal lengths up to 1 cm. The SDS ribbons’ measured resistivity confirmed the high powder content of the resulting material. The ability to produce solar cells on SDS multicrystalline silicon ribbons was demonstrated.

Effect of Grain Growth Control by Atmospheric Micro-Thermal- Plasma-Jet Crystallization of Amorphous Silicon Strips on TFT Characteristics

INTRODUCTION.For large area electronics on glass substrate, improvement of thin film transistor (TFT) performance is a key technological issue because higher resolution and functionality, such as 500 pixels per inch (ppi) displays, are required. Low temperature poly-silicon (LTPS) technology is quite promising in terms of high mobility (μFE ), high reliability and CMOS capability. However, present LTPS technology, based excimer laser annealing (ELA) technique, must solve the cost and variability issues. We have proposed micro-thermal-plasma-jet (µ-TPJ) technique for crystallization of amorphous silicon (a-Si) films [1]. Because of its simple structure and atmospheric pressure process, µ-TPJ enables low cost fabrication compared with ELA technique. We have demonstrated zone-melting recrystallization (ZMR) of a-Si by µ-TPJ irradiation [2]. However, ZMR forms random grain boundaries (GBs), which cause characteristic variability in TFTs. To solve these issues, we have attempted to control the grain growth by µ-TPJ crystallization of a-Si strip pattern and demonstrated CMOS circuit operation with high integrity and high frequency for peripheral circuit of displays [3]. In this work, we investigated in detail characteristics of TFTs with conventional and strip pattern. EXPERIMENTAL.A 200-nm-thick a-Si films were formed on quartz substrate and were patterned to form source, drain and channel. Then, 3×1012/cm2 phosphorus ions and boron ions were implanted in PMOS and NMOS respectively, because non-doped channel behaved as intrinsic P-type nature by this fabrication process [3]. After dehydrogenation at 450 °C, a-Si patterns were crystallized by µ-TPJ irradiation. In this condition, ~200 μm wide molten zone is formed and rapid re-crystallization to lateral direction is induced by the fast movement of molten Si. Here, we formed conventional and 1μm wide strip channel patterns before crystallization. After fabrication process [3], we compared electrical property and channel crystallinity. Crystallographic orientations and GBs were investigated by electron backscattering diffraction (EBSD) method. And TFT characteristics with respect to channel width (W) of both patterns were investigated. RESULTS AND DISCUSSION. In conventional pattern TFT, reduced field effect mobility (μFE ) and threshold voltage (Vth ) shift with respect to W were observed (Fig.1 (a)). On the other hand, strip pattern showed stable characteristics in all W (Fig.1 (b)). As shown in Fig.2, random GB were formed in W>3µm, but were clearly suppressed in narrow strips. In addition, strip pattern suppressed off leak current and showed high on current compared to conventional pattern. While μFE and Vth varied by increasing of W in conventional pattern, stable characteristics of μFE > 350 cm2/Vs, Vth = 3.6 ± 0.1V and outputs were obtained in strip pattern. In consideration of drawback of area loss by strip pattern, high μFE , low Vth and stable outputs are sufficient to compensate it as understood by the output characteristics (Fig.3). In addition, although the kink effect increased by degradation of Vth in conventional pattern (Fig.3 (a)), they were significantly suppressed in strip pattern by its uniformity of Vth (Fig.3 (b)). Thus, strip pattern is quite promising for layout and operation of CMOS circuit with high reliability. CONCLUSIONS.The µ-TPJ irradiation to a-Si strip pattern is quite effective for grain growth control. TFTs with proposed pattern showed high performance and low characteristics variability. This enabled us to operate CMOS circuit on insulating substrate under low supply voltage and high frequency. ACKNOWLEDGEMENTS. A part of this work was supported by Research Institute for Nanodevice and Bio Systems (RNBS), Hiroshima University and Funding Program for Next Generation World-Leading Researchers (NEXT Program) from the Japan Society for the Promotion of Science (JSPS). REFERENCES. [1] S. Hayashi, et al., Appl. Phys. Express 3(2010) 061401.[2] Y. Fujita, et al., Jpn. J. Appl. Phys. 51(2012) 02BH05.[3] S. Morisaki, et al., 10th Int. Thin-Film Transistor Conf. (2014) 15.

Effect of Grain Growth Control by Atmospheric Micro-Thermal- Plasma-Jet Crystallization of Amorphous Silicon Strips on TFT Characteristics

High performance thin film transistors (TFTs) are fabricated on quarts substrate based on zone-melting-recrystallization (ZMR) of amorphous silicon (a-Si) strips induced by micro-thermal-plasma- jet (µ-TPJ) irradiation. The grain boundaries (GBs) in strip pattern were almost excluded and most of the strips consist of ∑3 coincidence site lattices (CSLs) or in some cases single grains. Strip pattern was quite effective even in the case of short channel TFTs. N- and p-channel TFTs with typical field effect mobility (µFE ) of 380 and 140 cm2/Vs, respectively, are successfully fabricated with significantly reduced characteristics variability. These high µFE and low variation of threshold voltage (Vth ) by strip pattern showed significantly stable output characteristics regardless of the size of TFTs.

Defect annealing processes for polycrystalline silicon thin-film solar cells

► Defect annealing processes were applied to polycrystalline silicon thin films. ► Conventional rapid thermal annealing was compared to novel annealing processes using a laser system and a zone-melting recrystallization setup. ► The open circuit voltages could be enhanced from below 170 mV up to 482 mV. ► Increase in Sun's- V OC values with decrease in FWHM of the TO Raman phonon of crystalline silicon. ► Solar cells were fabricated for I – V -measurements: Best solar cell efficiency of 6.7%. A variety of defect healing methods was analyzed for optimization of polycrystalline silicon (poly-Si) thin-film solar cells on glass. The films were fabricated by solid phase crystallization of amorphous silicon deposited either by plasma enhanced chemical vapor deposition (PECVD) or by electron-beam evaporation (EBE). Three different rapid thermal processing (RTP) set-ups were compared: A conventional rapid thermal annealing oven, a dual wavelength laser annealing system and a movable two sided halogen lamp oven. The two latter processes utilize focused energy input for reducing the thermal load introduced into the glass substrates and thus lead to less deformation and impurity diffusion. Analysis of the structural and electrical properties of the poly-Si thin films was performed by Suns- V OC measurements and Raman spectroscopy. 1 cm 2 cells were prepared for a selection of samples and characterized by I – V -measurements. The poly-Si material quality could be extremely enhanced, resulting in increase of the open circuit voltages from about 100 mV (EBE) and 170 mV (PECVD) in the untreated case up to 480 mV after processing.

New method of fabricating silicon wafer for the photovoltaic application based on sintering and recrystallization steps

In the present work, a recrystallization process of sintered silicon wafers was studied to produce photovoltaic solar cells. The recrystallization step is carried out by Zone Melting Recrystallization (ZMR) or Full Wafer Recrystallization (FWR). Structural analysis and impurity content of the processed material are presented. Electrical characterization shows that mobility reaches values of 150 and 250cm2V−1s−1 in samples recrystallized by FWR and ZMR with P-type doping of 5×1016 and 3×1017at/cm3. The lifetime reaches values around 1μs. After solar cell fabrication, a conversion efficiency of 8.9% is obtained by using a simplified process without texturing.

Grain structure of thin-film silicon by zone melting recrystallization on SiC base layer

The grain structure of thin-film silicon layers obtained by chemical vapor deposition and zone melting recrystallization (ZMR) on SiC barrier layers, as developed for thin-film solar cells, have been investigated by electron backscatter diffraction (EBSD). The occurrence of subgrain boundaries was checked by defect etching.Twin boundaries form 1 to 100μm wide stripes, which are nearly parallel to the scan direction of ZMR. We find that stripe structure and the dominant grain orientations differ significantly from previously published ZMR layers grown on SiO2 surface. In a comprehensive model it is shown how the twinning structure and the dominant grain orientation can be related to the growth kinetics. The electronic activity of the defects was measured by electron beam induced current (EBiC). Contrary to other defects, the twin boundaries show no enhanced recombination. Therefore the found growth regime has potential advantages with respect of electronic properties of the layers.

Characterization of Recrystallized Sintered Silicon Substrates for Photovoltaic's Solar Cells

In this work, we describe a new process of fabrication of low-cost silicon wafers which are produced by sintering silicon powder followed by a Zone Melting Recrystallization (ZMR) step. The influence of the ZMR step on the physical and chemical characteristics of the substrate is reported. The evolution of the impurities content along the different steps of the substrate process was studied. In addition to the increase of the grain size and improved crystalline quality, the ZMR step allowed reducing the total impurities and especially the oxygen content already present in sintered wafer. Furthermore the ZMR improved drastically the value of the minority charge carrier lifetime resulting from impurities reduction and the crystal growth in the sintered substrate. The recrystallized sintered wafers showed a good majority carrier mobility of 245 cm2 V-1 s-1 and a doping level of 5x1016 atm cm-3. The efficiency of 8.9% obtained with the recrystallized sintered wafer, using the simplified cell process, is very encouraging.

Laser structuring of crystalline silicon thin-film solar cells on opaque foreign substrates

Crystalline silicon thin-film solar cells were fabricated on graphite substrates. A laser ablation process was developed for edge isolation of the thin-film cells. The shunt resistance was comparable to otherwise identical cells isolated by plasma etching, while the reproducibility of the laser isolation process was higher. The solar cells were characterized by current–voltage and light beam induced current measurements (LBiC). No interference was detected along the ablated edges. Spatial variations of the minority carrier lifetime are attributed to the grain structure of the seeding layer obtained by the zone melting recrystallization (ZMR).

Micro-Raman mapping on layers for crystalline silicon thin-film solar cells

Micro-Raman mappings have been used for characterization of our layers system developed for thin-film silicon solar cells. For the cubic SiC barrier layer a preferential orientation of the grains in 〈1 1 1〉 direction normal to the substrate was revealed. A high density of stacking faults resulted in the splitting of transversal optical (TO)-phonon modes, usually only observed in several non-cubic SiC polytypes. Within the silicon layers, which were obtained by zone melting recrystallization (ZMR) and subsequent epitaxial growth, a high residual stress of about 625 MPa was measured near the boundary towards the SiC layer. Outside of this boundary no residual stress could be detected, in spite of commonly found twin boundaries. Thus the main origin of residual stress in the silicon layers is due to the different expansion coefficients of the respective layers, while grain boundaries have no dominant effect.

First solar cells on silicon wafers doped using sprayed boric acid

A new method for boron bulk doping of silicon ribbons is developed. The method is based on the spraying of the ribbons with a boric acid solution and is particularly suited for silicon ribbons that require a zone-melting recrystallization step. To analyse the quality of the material thus obtained, multicrystalline silicon samples doped with this doping process were used as substrate for solar cells and compared with solar cells made on commercial multicrystalline silicon wafers. The values obtained for the diffusion length and the IV curve parameters show that the method of doping with the boric acid solution is suitable to produce p-doped silicon ribbons for solar cell applications.

ChemInform Abstract: Thermal Analysis of Zone-Melting Recrystallization of Silicon-on- Insulator Structures with an IR Heat Source: An Overview

ChemInform is a weekly Abstracting Service, delivering concise information at a glance that was extracted from about 100 leading journals. To access a ChemInform Abstract of an article which was published elsewhere, please select a “Full Text” option. The original article is trackable via the “References” option.

Sprayed boric acid as a dopant source for silicon ribbons

This paper presents a new method for bulk boron doping of silicon ribbons for solar cells. The method is based on the spraying of the ribbon with a solution of boric acid followed by zone melting recrystallization in an argon atmosphere. Dopant incorporation is evaluated by measuring the spreading resistance of the silicon ribbon. A numerical model for the incorporation of boron into silicon was developed, considering two competing mechanisms: boron diffusion during the heating step and evaporated boron transport in the gas phase. The dependence of the incorporation of boron on experimental parameters such as the direction of recrystallization and the flux of argon in and out of the furnace was measured, yielding results that are compatible with the numerical model. It is also shown that the mean incorporation of boron into the samples depends linearly on the initial concentration of boric acid.

Solar Cells from Thin Silicon Layers on AlN

Polycrystalline silicon layers were grown on AlN ceramic substrates in a rapid thermal chemical vapor deposition system at high temperature (~1150°C). Larger columnar grains, > 5µm in size, were obtained by the zone melting recrystallization (ZMR) technique. The p-n junction is formed by a phosphorous diffusion process to make a solar cell. Solar cell devices based on this Si layer result possess an open-circuit voltage of about 0.17V and a short-circuit current of about 6.6mA/cm2.

A-Si/c-Si heterojunction solar cells on SiSiC ceramic substrates

Silicon thin-film solar cells are considered to be one of the most promising cells in the future for their potential advantages, such as low cost, high efficiency, great stability, simple processing, and none-pol-lution. In this paper, latest progress on poly-crystalline silicon solar cells on ceramic substrates achieved by our group was reported. Rapid thermal chemical vapor deposition (RTCVD) was used to deposited poly-crystalline silicon thin films, and the grains of as-grown film were enlarged by Zone-melting Recrystallization (ZMR). As a great change in cell's structure, traditional diffused pn homojunction was replaced by a-Si/c-Si heterojunction, which lead is to distinct improvement in cell's efficiency. A conversion efficiency of 3.42% has been achieved on 1 cm 2 a-Si/c-Si heterojunction solar cell ( I sc = 16.93 mA, V oc = 310.9 mV, FF = 0.6493, AM = 1.5 G, 24 °C), while the cell with diffused homojunction only got an efficiency of 0.6%. It indicates that a-Si emitter formed at low temperature might be more suitable for thin film cell on ceramics.

Polycrystalline silicon thin‐film solar cells on various substrates

AbstractThin‐film polycrystalline silicon solar cells have been fabricated on various substrates, such as inactive P++ mono‐crystalline silicon substrates, p++ mono‐Si substrates covered by thermally oxidized SiO2 and ceramic substrates by means of a rapid thermal chemical vapour deposition (RTCVD) technique. Zone melting recrystallization (ZMR) was applied in the process in order to enlarge the grain size of the deposited silicon thin film. The deposition conditions were studied. The scanning rate of the ZMR process was investigated. The best conversion efficiency of 15.12% (AM1.5G, 24.5 °C) has been achieved on inactive P++ mono‐crystalline silicon substrates without cell surface texture and 10.21% (AM1.5, 24.5 °C) on p++ c‐Si substrates covered by thermally oxidized SiO2 with the cell area of 1.07 cm2. The polycrystalline silicon thin film was also deposited on Al2O3 substrates by a RTCVD process. A simple ZMR process was used without any intermediate layer and cap layers. The maximum grain size of the silicon thin film was about one millimeter in width and a few millimeters in length after ZMR. (© 2006 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

High-throughput zone-melting recrystallization for crystalline silicon thin-film solar cells

Crystalline silicon thin-film solar cells which shall exceed a conversion efficiency of 15% require a coarse-grained silicon layer of at least 5 μm thickness as an absorber layer, with minority carrier diffusion length and grain diameter at least twice the layer thickness. At Fraunhofer ISE, we use zone-melting recrystallization to recrystallize a silicon layer grown by chemical vapor deposition on high-temperature stable substrates. Our main focus is the development of tools and processes for achieving silicon layers of sufficient electrical quality at high throughput and low cost. A processor for in-line zone melting of 400-mm-wide samples was developed, which has gas curtain load locks and thus offers a theoretical maximum throughput of approx. 10 m 2/h at a melting velocity of 500 mm/min. Zone-melting experiments with varying melting velocity showed that high crystal quality can be maintained even for velocities up to 350 mm/min.

Controlled line shaped electron beam for silicon zone melting recrystallization on float glass substrates

A line shaped electron beam system for the zone melting recrystallization (ZMR) of thick silicon films on float glass substrates is described. The low thermal stability of the glass requires a rapid regulated zone heating. The electron beam system allows the ZMR in a continuous scan without pulsing. The setup consists of the tungsten wire with a Pierce reflector as line cathode and the moving substrate as anode. A negative voltage applied on the reflectors limits the electron emission and provides the necessary control. The melt energy for optimized processing decreases with an increase of the velocity. The beam profiles and penetration depth of the electrons is discussed. Homogenous polycrystalline silicon areas of several 10cm2 are achieved on a tungsten coated borosilicate float glass for the intended use as solar cell absorber.

Crystalline silicon thin-film solar cells—recent results at Fraunhofer ISE

Crystalline silicon thin-film solar cells combine the advantages of the stability and high-efficiency potential of crystalline silicon solar cell technology with the low material utilization of the thin-film solar cell technology. At Fraunhofer ISE the wafer equivalent concept is currently pursued. Within this concept, the active silicon layers are deposited on high-temperature stable substrates. The resulting substrate/layer sandwich can be processed into a solar cell using the same techniques that are used in conventional crystalline silicon wafer solar cell processing, hence the name wafer equivalent. In the present paper we report on how we realized wafer equivalents and explain in detail our development work on processors for both large-area silicon deposition and for zone melting recrystallization. An overview is given on the solar cell results achieved in this area.

Fabrication of SOI Films with High Crystal Uniformity by High-Speed Zone-Melting Crystallization

Silicon-on-insulator (SOI) films for solar cells were fabricated by zone-melting re-crystallization (ZMR) and by zone-melting crystallization (ZMC). For ZMR, polycrystalline Si (poly-Si) films were deposited on layers by chemical vapor deposition, and for ZMC, amorphous Si (a-Si) films by radio-frequency sputtering. After another layer was deposited on the SOI film to form a sandwich structure the SOI films were crystallized or recrystallized by ZMC or ZMR. The effects of Si film thickness, temperature of the lower heater (used in the ZMC or ZMR process), and scan speed, which is the dominant factor in the fabrication cost on the structural change in the films after ZMR and ZMC and on the crystal orientations were determined. Comparison between ZMC films and ZMR films showed that for all scan speeds, the a-Si ZMC films had much higher uniformity in their crystal orientations than did the poly-Si ZMR films. Results showed that at a high scan speed of 7.0 mm/s, an SOI with high crystal uniformity [over 90% Si (100) texture] with no voids could be fabricated by ZMC at optimized conditions (i.e., lower heater temperature of 1893 K and a-Si film thickness of 0.1 μm). © 2003 The Electrochemical Society. All rights reserved.

Crystalline silicon thin-film solar cells on ZrSiO4 ceramic substrates

The development of a low-cost substrate is one of the major technological challenges for crystalline Si thin-film solar cells. Zirconium silicate (ZrSiO 4 ) ceramics is a material which can meet the demanding physical requirements as well as the cost goals. Thin microcrystalline Si films were deposited by atmospheric pressure CVD on ZrSiO 4 -based ceramic substrates coated with barrier layers. The Si film was transferred into a multicrystalline grain structure by zone-melting recrystallization (ZMR). Film growth was analyzed in situ and correlated with substrate and barrier layer properties. Thin-film solar cells were fabricated from selected coarse-grained films. The best solar cell achieved an efficiency of 8.3% with a short circuit current density of 26.7 mA / cm 2 . The effective diffusion length obtained from internal quantum efficiency measurements was about 25 μm .