Wire Power Consumption Research Articles

Learning-based adaptation to applications and environments in a reconfigurable network-on-chip for reducing crosstalk and dynamic power consumption

To solve two increasingly problematic issues, namely crosstalk interferences and wire power consumption, in a Network-on-Chip (NoC), Power-aware and Reliable Encoding Schemes Supported reconfigurable Network-on-Chip (PRESSNoC) is proposed. It includes a novel reconfigurable NoC design, four data encoding strategies, and an intelligent REasoning And Learning (REAL) framework for encoding strategy selection. Instead of pre-integrating all encoding strategies into a NoC at design time, REAL can configure PRESSNoC with an appropriate encoding method at run-time. Compared to baseline NoCs that use a fixed encoding method, the average benefit to overhead ratio of the PRESSNoC is greater by 88%, 39%, and 277%, at the interference, application, and system levels, respectively. Experiments show that at the same overheads of performance and hardware resources PRESSNoC induces a higher probability toward the reduction of crosstalk interferences and dynamic power consumption.