Wide Load Current Range Research Articles

A High Current Efficiency CMOS LDO Regulator with Low Power Consumption and Small Output Voltage Variation

In this paper we present an LDO based on an error amplifier. The designed error amplifier has a gain of 89.93dB at low frequencies. This amplifier's Bandwidth is 50.8MHz and its phase margin is <TEX>$59.2^{\circ}C$</TEX>. Also we proposed a BGR. This BGR has a low output variation with temperature and its PSRR at 1 KHz is -71.5dB. For a temperature variation from <TEX>$-40^{\circ}C$</TEX> to <TEX>$125^{\circ}C$</TEX> we have just 9.4mV variation in 3.3V LDO output. Also it is stable for a wide range of output load currents [0-200mA] and a <TEX>$1{\mu}F$</TEX> output capacitor and its line regulation and especially load regulation is very small comparing other papers. The PSRR of proposed LDO is -61.16dB at 1 KHz. Also we designed it for several output voltages by using a ladder of resistors, transmission gates and a decoder. Low power consumption is the other superiority of this LDO which is just 1.55mW in full load. The circuit was designed in <TEX>$0.35{\mu}m$</TEX> CMOS process.

Accurate Dead-Time Control for Synchronous Buck Converter With Fast Error Sensing Circuits

Dead-time controls for synchronous buck converter are challenging due to the difficulties in accurate sensing and processing the on/off dead-time errors. For the control of dead-times, an integral feedback control using switched capacitors and a fast timing sensing circuit composed of MOSFET differential amplifiers and switched current sources are proposed. Experiments for a 3.3 V input, 1.5 V-0.3 A output converter demonstrated 1.3 ~ 4.6% efficiency improvement over a wide load current range.

One zero‐voltage‐switching three‐transistor push–pull converter

One three-transistor push–pull (TTPP) converter is proposed in this study. In this TTPP converter, an extra transistor is inserted between the input power supply and midpoint of two primary windings. On the secondary side, a saturable inductor and an extra freewheeling diode are employed. Adopting the proposed pulse-width modulation method for three power switches, two original transistors can achieve zero-voltage-switching (ZVS) easily in a wide range of load current, the extra transistor can also realise ZVS assisted by the saturable inductor. Each operation mode of the proposed TTPP converters is discussed in detail. The soft-switching conditions are explained. One 83.3 kHz, 800 W prototype has been built. Its peak efficiency reaches 94.87%. The experimental result is provided to verify the analysis.

A High-Efficiency Monolithic DC-DC PFM Boost Converter with Parallel Power MOS Technique

This paper presents a high-efficiency monolithic dc-dc PFM boost converter designed with a standard TSMC 3.3/5V 0.35 μm CMOS technology. The proposed boost converter combines the parallel power MOS technique with pulse-frequency modulation (PFM) technique to achieve high efficiency over a wide load current range, extending battery life and reducing the cost for the portable systems. The proposed parallel power MOS controller and load current detector exactly determine the size of power MOS to increase power conversion efficiency in different loads. Postlayout simulation results of the designed circuit show that the power conversion is 74.9–90.7% efficiency over a load range from 1 mA to 420 mA with 1.5 V supply. Moreover, the proposed boost converter has a smaller area and lower cost than those of the existing boost converter circuits.

A Modular 1 mm$^{3}$ Die-Stacked Sensing Platform With Low Power I$^{2}$C Inter-Die Communication and Multi-Modal Energy Harvesting

A 1.0 mm3 general-purpose sensor node platform with heterogeneous multi-layer structure is proposed. The sensor platform benefits from modularity by allowing the addition/removal of IC layers. A new low power I2C interface is introduced for energy efficient inter-layer communication with compatibility to commercial I2C protocols. A self-adapting power management unit is proposed for efficient battery voltage down conversion for wide range of battery voltages and load current. The power management unit also adapts itself by monitoring energy harvesting conditions and harvesting sources and is capable of harvesting from solar, thermal and microbial fuel cells. An optical wakeup receiver is proposed for sensor node programming and synchronization with 228 pW standby power. The system also includes two processors, timer, temperature sensor, and low-power imager. Standby power of the system is 11 nW.

Fully Self-Powered Electromagnetic Energy Harvesting System With Highly Efficient Dual Rail Output

This paper presents a vibration-based energy harvesting system composed of a compact electromagnetic (EM) power generator and highly efficient full-wave interface electronics in a system-on-package. The system harvests energy from ambient vibrations, and delivers a smooth and reliable dual rail DC supply to power up a practical load. The energy harvester module is an in-house double-coil EM transducer which generates AC voltage in response to low frequency ambient vibrations. Voltage regulation is achieved by the interface electronics at the core of the system, which is designed to rectify the input AC voltage with peak amplitude ranging from several hundred mVs to several Volts, with maximum efficiency. The interface electronics contains an active rectifier with high conversion efficiency (>;80%) for a wide range of load currents (0-42 μA). A passive network, built from low threshold-voltage chip diodes and capacitors, generates a dual supply voltage from one of the coils to power up the active rectifier. The autonomous system of 16 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> volume (comparable to the size of a C-Type battery), delivers 54 μW to a 37-μA load through a dual rail 1.46 V DC voltage with total system efficiency of 81%, when subjected to low frequency (8 Hz) external vibrations. The maximum overall system power density has been validated to be 6.06 μW/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> , three times what was previously reported for a batteryless vibration driven system.

Fast transient current-steering CMOS LDO regulator based on current feedback amplifier

This paper presents a current-steering approach to implement a fast transient response low-dropout regulator (LDO) based on a current feedback amplifier (CFA) topology. The circuit does not require any internal compensation capacitor, being stable for a wide range of output load currents [0–100mA] and a 1μF output capacitor. The CFA consists of an open-loop voltage follower with output local current–current feedback based on a level-shifted flipped voltage follower (LSFVF) which is instrumental to achieve high regulation and fast transient response. The inverting output buffer stage of the CFA together with current-mirror-based driving of the power pass transistor results in high PSRR. Post-layout simulation results for a 0.35μm CMOS process design reveal that the proposed LDO requires 59μA quiescent current at no-load condition and at full-load condition has a current efficiency of 99.8%. For a 1μF output capacitor, the maximum output voltage variation to a 0–100mA load transient with rise and fall times of 10 and 100ns is only 3mV, and the PSRR is smaller than −56dB over the entire load current range.

Dual Modulation Technique for High Efficiency in High-Switching Buck Converters Over a Wide Load Range

A dual modulation technique to improve power conversion efficiency with minimal increase in output voltage ripple is presented. The worsening switching noise caused by parasitic resistance and inductance due to high-switching operation can also be alleviated by the proposed ac ripple detector. Furthermore, the dual modulation method can speed up the load transient response since the switching frequency can increase to 5 MHz during the transient period. At very light loads, the switching frequency is always kept higher than the acoustic frequency to avoid noisy sound. Experiment results show that the converter operates at 5 MHz using a small inductor of 1 μH. The load transient response time is shorter than 3 μs when load current changes from 150 to 450 mA or vice versa. Power efficiency is kept higher than 85% over a wide load current range. Specifically, light efficiency can be raised to about 45% above that of the conventional design.

An Integrated Speed- and Accuracy-Enhanced CMOS Current Sensor With Dynamically Biased Shunt Feedback for Current-Mode Buck Regulators

This paper presents a new compact on-chip current-sensing circuit to enable current-mode buck regulators operating at a high switching frequency for reducing the inductor profile. A dynamically biased shunt feedback technique is developed in the proposed current sensor to push nondominant poles to higher frequencies, thereby improving the speed and stability of the current sensor under a wide range of load currents. A feedforward gain stage in the proposed current sensor also increases the dc loop-gain magnitude and thus enhances the accuracy of the current sensing. A current-mode buck regulator with the proposed current sensor has been implemented in a standard 0.35-μm CMOS process. Measurement results show that the proposed current sensor can achieve 95% sensing accuracy and <;; 50-ns settling time. The buck converter can thus operate properly at the switching frequency of 2.5 MHz with the duty cycle down to 0.3. The output ripple voltage of the regulator is <;; 43 mV with a 4.7-μF off-chip capacitor and a 2.2-μH off-chip inductor. The power efficiency of the buck regulator achieves above 80% over the load current ranging from 25 to 500 mA.

DCM, FSM, dead time and width controllers for a high frequency high efficiency buck DC-DC converter over a wide load range

This paper presents a width controller, a dead time controller, a discontinuous current mode (DCM) controller and a frequency skipping modulation (FSM) controller for a high frequency high efficiency buck DC-DC converter. To improve the efficiency over a wide load range, especially at high switching frequency, the dead time controller and width controller are applied to enhance the high load efficiency, while the DCM controller and FSM controller are proposed to increase the light load efficiency. The proposed DC-DC converter controllers have been designed and fabricated in the Chartered 0.35 μm CMOS process, and the measured results show that the efficiency of the buck DC-DC converter is above 80% over a wide load current range from 8 to 570 mA, and the peak efficiency is 86% at 10 MHz switching frequency.

Fully on-chip switched capacitor NMOS low dropout voltage regulator

This paper presents a 1.5 V 50 mA low dropout voltage (LDO) regulator using an NMOS transistor as the output pass element. Continuous time operation of the LDO is achieved using a new switched floating capacitor scheme that raises the gate voltage of the pass element. The regulator has a 0.2 V dropout at a 50 mA load and is stable for a wide load current range with loading capacitances up to 50 pF. The output variation when a full load step is applied is 300 mV and the recovery time is below 0.3 μs. It is designed in a 0.13 μm CMOS process with an area of 0.008 mm2 and its operation does not require any external component.

Design and implementation of a neural network controller for real-time adaptive voltage regulation

An adaptive controller based on multi-layer feed-forward neural network is developed for real-time voltage regulation of a class of PSFB (phase-shifted full-bridge) DC–DC converters. The controller has the unique advantages of nonlinear mapping and adaptive learning, and performs well over a wide range of input voltages and output load currents. The controller is implemented and tested in hardware using a DSP (digital signal processor) board. Experimental results show that it outperforms conventional controllers in both line regulation and load regulation.

Dithering Skip Modulation, Width and Dead Time Controllers in Highly Efficient DC-DC Converters for System-On-Chip Applications

This paper proposes temperature-independent load sensor (LS), optimum width controller (OWC), optimum dead-time controller (ODC), and tri-mode operation to achieve high efficiency over an ultra-wide-load range. Higher power efficiency and wider loading current range require rethinking the control method for DC-DC converters. Therefore, a highly efficient tri-mode DC-DC converter is invented in this paper for system-on-chip (SoC) applications, which is switched to sleeping mode at very light load condition or to high-speed mode at heavy load condition. The efficiency improvement is upgraded by inserting new proposed dithering skip modulation (DSM) between conventional pulse-width modulation (PWM) and pulse-frequency modulation (PFM). In other words, an efficiency-improving DSM operation raises the efficiency drop because of transition from PWM to PFM. Importantly, DSM mode can dynamically skip the number of gate driving pulses, which is inverse proportional to load current. Simplistically and qualitatively stated, the novel load sensor automatically selects optimum modulation method and power MOSFET width to achieve high efficiency over a wide load range. Moreover, optimum power MOSFET turn-on and turn-off delays in synchronous rectifiers and reduced ground bounce can save much switching loss by current-mode dead-time controller. Experimental results show the tri-mode operation can have high efficiency about 90% over a wide load current range from 3 to 500 mA. Owing to the effective mitigation of the switching loss contributed by optimum power MOSFET width and reduction of conduction loss contributed by optimum dead-times, the novel width and dead-time controllers achieve high efficiency about 95% at heavy load condition and maintain the highly efficient performance to very light load current about 0.1 mA.

An Accurate, Low-Voltage, CMOS Switching Power Supply With Adaptive On-Time Pulse-Frequency Modulation (PFM) Control

Integrated switching power supplies with multimode control are gaining popularity in state-of-the-art portable applications like cellular phones, personal digital assistants (PDAs), etc., because of their ability to adapt to various loading conditions and therefore achieve high efficiency over a wide load-current range, which is critical for extended battery life. Constant-frequency, pulsewidth modulated (PWM) switching converters, for instance, have poor light-load efficiencies because of higher switching losses while pulse-frequency modulation (PFM) control in discontinuous-conduction mode (DCM) is more efficient at light loads because the switching frequency and associated switching losses are scaled down with load current. This paper presents the design and integrated circuit prototype results of an 83% power efficient 0.5-V 50-mA CMOS PFM buck (step-down) dc-dc converter with a novel adaptive on-time scheme that generates a 27-mV output ripple voltage from a 1.4- to 4.2-V input supply (battery-compatible range). The output ripple voltage variation and steady-state accuracy of the proposed supply was 5 mV (22-27 mV) and 0.6% whereas its constant on-time counterpart was 45 mV (10-55 mV) and 3.6%, respectively. The proposed control scheme provides an accurate power supply while achieving 2%-10% higher power efficiency than conventional fixed on-time schemes with little circuit complexity added, which is critical during light-loading conditions, where quiescent current plays a pivotal role in determining efficiency and battery-life performance

A simple fuzzy logic based robust active power filter for harmonics minimization under random load variation

Widespread applications of power electronic-based loads continue to increase concerns over harmonic distortion. However, it is desired to draw purely sinusoidal current from the distribution network, but this is no longer the case with new generation loads, consisting of power electronic converters. The current harmonics produced by these non-linear loads further result in voltage distortion and leads to various power quality problems. This paper, therefore, deals with a simple fuzzy logic based robust active power filter to minimize the harmonics for wide range of variations of load current under stochastic conditions. The proposed control scheme is very simple and it is also capable of maintaining the compensated line currents balanced, irrespective of the unbalance in the load currents. The proposed methodology is extensively tested for wide range of variable load current under stochastic conditions and results are found to be quite satisfactory to mitigate harmonics and reactive power components from the utility current. The results presented in this paper clearly reflect the effectiveness of the proposed APF to meet the IEEE-519 standard recommendations on harmonic levels.

A New Micro-Switching Regulator Using a Planar-Type Magnetic Core

The operation of a new micro-switching regulator using a planar-type magnetic core is described. The planar-type micro-magnetic core consists of Co-Zr amorphous magnetic films and zigzag-pattern coils, and is used as the main transformer in the switching regulator. When the core is driven at the parallel resonance frequency of the inductance and the stray capacitance of the coil, highly efficient regulator operation is expected, because the core loss is reduced when using a constant-voltage power supply. At a driving frequency of 1 MHz, the output and efficiency are 0.54 W and 30% respectively. Excellent voltage regulation is also achieved over a wide load-current range.

積層磁心を用いたマイクロスイッチングレギュレータの基礎特性

The operation of a new micro-switching regulator using a planar-type magnetic core is described. The planar-type micro-magnetic core consists of Co-Zr amorphous magnetic films and zigzag-pattern coils, and is used as the main transformer in the switching regulator. When the core is driven at the parallel resonance frequency of the inductance and the stray capacitance of the coil, highly efficient regulator operation is expected, because the core loss is reduced when using a constant-voltage power supply. At a driving frequency of 1 MHz, the output and efficiency are 0.54 W and 30% respectively. Excellent voltage regulation is also achieved over a wide load-current range.

Modeling of GaAs/AlGaAs MODFET inverters and ring oscillators

Detailed understanding of the MODFET inverter chains is lacking and present designs are based on ground rules developed by trial and error. We developed a simple and straightforward model for the current-voltage characteristics using results from numerical solutions of the quantum mechanical problem; this model agrees very well with experimental results obtained in our laboratory. High-frequency gate capacitance voltage characteristics for a wide gate voltage range was modeled for the first time in a similar fashion. These models were used to simulate a chain of inverters at 77 and 300 K for a wide range of supply voltage and load current. The maximum device speed is obtained for small supply voltages, ≤ 1 V both at 300 and 77 K, where the effects of transconductance degradation and large gate capacitance are minimized. The devices exhibit under 10-ps switching times both at 300 and 77 K, with 77 K logic swing being much larger. The results are in qualitative agreement with the reported experimental results.

A very high efficiency DC to DC inverter, optimised for supplying high voltages in battery operated equipment

A simple, push-pull transistorised DC-DC inverter is described, in which very high efficiency is obtained over a wide range of load currents. 'No-load' current is kept to a minimum by a novel feedback arrangement, making the inverter a suitable replacement for the now unobtainable layer-type HT (B) battery. Two circuit examples, for converting 6 V to 130 V, are fully described, one optimised for best conversion efficiency (exceeding 80% for 0.3 to 30 mA output current) with low no-load input current (<or=1 mA at 6 V), the other optimised for small size of transformer (18 mm pot core), and careful filtering giving <or=3 mV RMS of oscillation voltage on the input and output leads. Graphs are presented to show conversion efficiency and operating frequency over three decades of output load current. Completed units have been used in current sources for iontophoresis, electromyography, and general purpose neurological teaching.

The effects of pre-loading on fuse performance

In actual operation, when a fault occurs on a fused circuit, this circuit will probably be carrying a load current, so that the fuse element will be at some temperature above ambient, and this will affect its operating characteristics under the fault conditions. Standard specifications of test do not take this into account, so that fuses are tested when initially at ambient temperature. Tests carried out on fuses with single-wire elements over a wide range of load and fault currents are described. These have shown the range and amount of the reduction in pre-arcing time caused by preloading; allowances for this reduction suggested previously do not appear to have been complete. The arcing time is also affected, and the transient voltage produced by the fuse when interrupting the circuit is reduced by pre-loading. Tests at a constant prospective current, with the instant of circuit closure varied throughout a half-cycle, have shown large variations in pre-arcing times and in transient voltages, both for pre-loaded and unloaded fuses. The temperature rise of the element centre for any load current has been calculated and verified by tests using temperature-sensitive paints. With a knowledge of this temperature, the reduction in the current-heat integral with pre-loading has been calculated and checked experimentally.